Job Title: Senior Digital Design Engineer
Location:
Grenoble, France
Job Type: permanent
Salary: 45K – 65K dependant on experience
Client Overview:
Designs analog and digital integrated circuits for internal teams and external customers.
Medical applications, consumer, automotive, industrial and other markets.
Role Responsibilities:
-You study, specify and design digital blocks, sub-systems and/or top level, making area/power estimations
-You elaborate testability insertion strategy corresponding to the circuit specifications
-You perform verification tasks until the generation of test patterns for silicon measurements in our lab.
-You improve the digital design, functional and test mode verification flow
-You perform digital synthesis and Design for Test (DfT), using techniques that reduce the difficulty and cost associated when testing an integrated circuit
-You lead, debate and present the choice of architectures and design status during review meetings within the ASIC project team and in front of customers.
Experience Required:
-Engineering degree (or equivalent) in microelectronics
-5+ years in Front-end ASIC digital design
-Experience in VHDL and/or Verilog and/or SystemVerilog, and in digital synthesis for DFT
-Comfortable in scripting (python, tcl)
-Fluent English
-Bonuses:
-French Speaking
-knowledge of different tools (Mentor, Synopsys, Cadence)
-Design in different languages (SystemVerilog, VHDL)
-Experience in mixed ASIC environment.
If you would like to learn more about this opportunity, please Apply via # or Apply +44 # #
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