Principal Digital Design Engineer

Location:

(08029) Spain

Salary:

100K EUR per annum plus 20% bonus

Type:

Permanent

Main Industry:

Search Engineering Jobs

Advertiser:

microTECH Global Ltd

Job ID:

130717172

Posted On:

25 June 2024

Role – Principal Digital Design Engineer
Location – Barcelona, Spain
Salary – 100K EUR per annum

Visa sponsorship available for exceptional, senior engineers with a multitude of industry experience.

Job Summary –
The candidate must have demonstrated success in digital design & verification/infrastructure development for digital FPGAs/ASICs.
Other key skills include technical/project leadership, documentation, RTL design knowledge, and backend flow and tools knowledge.
The position requires both technical and leadership skills, while working closely with multi-disciplinary groups to drive & design key aspects of ASIC/pwr mgmt. IC’s that meets the requirements of products.
Candidate will be lead designer, support verification, and be technical focus on one or more device and/or sections. Candidate will also support pre/post-silicon design validation and support Design/ATE/Application & Systems group.
Essential Functions –
Support & develop the chip/digital level architecture and functional blocks
Provide technical documentation with specifications, block diagrams, and requirements to stakeholders.
Develop system and chip level simulation verification techniques and methodology.
Digital Design (RTL design): ASIC or FPGA from concept to implementation
Knowledge and/or responsibility in synthesis, timing closure, and formal verification.

Qualifications –
– 10+ years experience in design plus verification of ASIC or FPGA
– PhD/BS/MS in Electrical Engineering with emphasis in Digital Design/VLSI coursework.
– Broad & Strong knowledge of ASIC development process and digital design techniques.
– Proficient in standard DV languages (Verilog, SystemVerilog, UVM)
– Experience with programming, scripting and automation languages(C/C++, shell, Perl, TCL, Python, etc).
– Solid knowledge and experience working through the entire Digital Design Flow: Specification definition, RTL Verification, Synthesis, P&R, Gate-Level Verification, Power Estimation, ATPG Generation and Simulation, AMS Sims, etc.

If you are interested, # and provide your CV.

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