Master Thesis: Development of asynchronous digital Network-on-Chip router for neuromorphic hardware

  • Contract
  • Germany
  • Posted 3 months ago


Fraunhofer EMFT conducts cutting-edge applied research on sensors and actuators for people and the environment. The about 150 employees in the three locations in Munich, Oberpfaffenhofen and Regensburg possess impressive long-term experience and wide-ranging know-how in the fields of microelectronics and microsystem technology. The technology offering of the research institute ranges from semiconductor processes, MEMS technologies and 3D integration to foil electronics. These nano- and microtechnologies are the basis for the other competence areas at Fraunhofer EMFT: sensor solutions, safe and secure electronics, and micropumps. The interdisciplinary interaction of these competencies enables the development of truly novel solutions to meet the current challenges facing our society.

The Circuit Design working group now offers the following topic for a Master’s thesis: Design, implementation and analysis of an asynchronous digital Network-on-Chip (NoC) router for scalable neuromorphic hardware.

A single neuron in the human brain can be connected via synapses to up to 10,000 other neurons. Biology implements each connection physically in parallel “hardware”. Chip area limitations do limit the number of connections we can physically implement on hardware. Networks-on-Chip (NoCs) are a way to virtualize physical connections and share the same hardware for message-based data exchange between different senders and receivers. Routing protocol and flow control define how a message makes its way through the NoC. State-of-the-art, target address based, dimension-order routed methods do not support an efficient single-message multicast from one sender to many receivers. This is one of the main communication patterns in neuromorphic hardware. Instead, they often rely on sending the same message individually to each receiver. Therefore, the Circuit Design group, which is working on HW/SW co-design of efficient mixed-signal neuromorphic hardware architectures for SNN edge applications with ultra-low power consumption, developed a new routing concept suitable for scalable asynchronous neuromorphic hardware. The aim of the Master Thesis is to study the existing NoC routing protocols, especially for multi-cast, and the already developed concept. An asynchronous digital router for the proposed concept and one of a standard routing protocol should be designed and implemented as a Verilog netlist. The designs may be implemented in a manual physical design. Finally, the routers should be compared for through-put, memory requirement, traffic-dependent delay variations and number of routing operations.

What you will do

  • Study of existing NoC routing protocols and the proposed concept
  • Design of Verilog netlists for two asynchronous digital routers: one for a standard dimension-ordered, target address based routing protocol and one for the proposed concept
  • Comparison of the two concepts for through-put, memory requirement, traffic-dependent delay variations and number of routing operations 
  • Documentation and presentation of the results

What you bring to the table

  • Course of Study in the field of Electrical Engineering, Computer Science or similar study fields
  • Experience in Verilog/VHDL
  • Experience in Virtuoso physical design flow and/or with asynchronous digital circuits is a big plus

In addition, we expect a self-reliant, analytical and structured way of working and enjoy working in an international team. You are familiar with scientific working techniques and have good communication skills in English, both written and spoken.

What you can expect

We offer you an open and collegial working environment as well as a challenging and varied Thesis with responsibility and flexible working hours that fit your studies. At EMFT we value commitment and creativity, which is why we allow freedom for your ideas and abilities.
Under certain conditions, a publication of the result may be possible and encouraged.

We value and promote the diversity of our employees’ skills and therefore welcome all applications – regardless of age, gender, nationality, ethnic and social origin, religion, ideology, disability, sexual orientation and identity. Severely disabled persons are given preference in the event of equal suitability. 

With its focus on developing key technologies that are vital for the future and enabling the commercial utilization of this work by business and industry, Fraunhofer plays a central role in the innovation process. As a pioneer and catalyst for groundbreaking developments and scientific excellence, Fraunhofer helps shape society now and in the future. 

Interested? Apply online now. We look forward to getting to know you!

Questions will be answered by:
Ferdinand Pscheidl
[email protected]

Fraunhofer Institute for Electronic Microsystems and Solid State Technologies EMFT  

Requisition Number: 68454                Application Deadline: 09/26/2023

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