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As a Layout Engineer you will collaborate in the development of advanced analog integrated circuit designs using best-in-class Synopsys suite of tools. You will be working with local and global teams in developing layout for complex mixed-signal designs in the latest technology nodes. In your role you will be accountable for block ownership with technical understanding and skills. As a member of our team, you will be developing IP in various technology nodes and foundries for different customers in a fast paced and exciting design environment.
Main Responsibilities:
Key Requirements:
Nice to have
Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
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