microTECH Global Ltd
- Location:
- (w) Poland
- Salary:
- market rate
- Type:
- Permanent
- Main Industry:
- Search Engineering Jobs
- Advertiser:
- microTECH Global Ltd
- Job ID:
- 133324500
- Posted On:
- 24 August 2026
We are looking for a world-class compiler and performance optimization expert to join our deep learning infrastructure team. You will take ownership of building a high-performance Triton compiler and kernel optimization framework, driving the next generation of AI workloads on NPUs. This is a highly technical role that sits at the intersection of AI compilation, NPU programming, and system performance engineering.
Key Responsibilities
-Lead the design and development of the Triton compiler and performance optimization framework, enabling high-performance operator implementations on NPUs.
-Implement state-of-the-art Triton kernels (e.g., Attention, MatMul, LayerNorm, Conv, Softmax) with best-in-class efficiency.
-Optimize memory access patterns and parallel scheduling, deeply understanding cache behavior, register allocation, and SM occupancy limits.
-Drive end-to-end performance optimization by integrating Triton with framework backends (e.g., PyTorch, XLA) and runtime stacks..
-Research and apply auto-tuning, kernel fusion, and operator scheduling technologies to maximize performance scalability.
-Mentor team members in Triton kernel development and establish standard processes for performance analysis and optimization.
-Stay on top of cutting-edge compiler technologies (MLIR, TVM, Hidet, Cutlass) and introduce innovative ideas to push performance boundaries.
-Conduct performance modeling and workload fingerprinting for large models (LLM, Diffusion, etc.) to guide system-level optimization.
What We’re Looking For
-Master’s degree or above in Computer Architecture, Compiler Theory, High Performance Computing, or related field; PhD preferred.
-5+ years of experience in NPU/GPU programming, operator optimization, or compiler development.
-Deep understanding of accelerator architectures and performance bottleneck analysis (compute units, vector lanes, memory hierarchy, caches, etc.)..
-Proficiency in Triton, PTX, or LLVM IR for low-level programming and optimization.
-Familiarity with PyTorch, TensorFlow, or JAX, and their graph execution and operator scheduling mechanisms.
-Proven ability to independently develop, benchmark, and optimize complex kernels.
-Skilled with performance profiling tools (e.g., perf, torch.profiler, and other vendor-neutral or runtime profilers) for quantitative analysis and performance modeling.
-Strong system design and software engineering skills, balancing performance, maintainability, and generality.
Bonus Points
-Open-so
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